1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory device and a method for manufacturing the same.
2. Background Art
In recent years, semiconductor memory devices with memory cells three-dimensionally arranged therein have been proposed to increase their integration density for higher capacity and lower cost per bit. For instance, in a technique disclosed in JP-A 2007-266143 (Kokai), electrode films and dielectric films are alternately stacked on a silicon substrate to form a stacked body, and then memory holes are formed in this stacked body. A charge storage layer is formed on the side surface of the memory hole, and a silicon pillar is buried inside the memory hole. Thus, a memory cell can be formed at each intersection between the electrode film and the silicon pillar, and the memory cells can be three-dimensionally arranged.
In such a three-dimensional semiconductor memory device, the high integration of memory cells is realized by stacking a plurality of electrode films. Hence, the number of stacked electrode films needs to be increased to achieve a sufficient integration density. On the other hand, to avoid increasing the manufacturing cost, memory holes need to be simultaneously formed in the stacked body with a plurality of electrode films stacked therein. Hence, increasing the number of stacked electrode films results in thickening the stacked body, and the aspect ratio of the memory hole, that is, the ratio of the depth of the memory hole to its diameter becomes large.
However, the memory hole, particularly when formed in a dielectric film, tends to have a tapered side surface, and is thinned downward. Thus, for a large aspect ratio of the memory hole, the diameter of the memory hole differs between its upper portion and lower portion, and the curvature of the inner surface of the memory hole differs therebetween. This makes a difference in the intensity of electric field applied to the charge storage layer and in the characteristics of the memory cell.